Visible to Intel only — GUID: sss1458191622012
Ixiasoft
Visible to Intel only — GUID: sss1458191622012
Ixiasoft
1.9.1. Configuration Time Calculation Examples
The following are the configuration time calculation examples for normal mode, page mode, and burst mode:
Normal Mode
- Normal mode configuration time calculation:
.rbf size for EP2S15 = 577KB = 590,848 Bytes
Configuration mode = FPP without data compression or encryption
Flash access mode = Normal Mode
Flash data bus width = 16 bits
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2
- Use the following formulas in this calculation:
Caccess = Taccess*Fclk+1
Cflash for Normal Mode = Caccess / 2
Ccfg = 2
Coverhead = 3*Caccess
Total Clock Cycles = Coverhead + max (Cflash, Ccfg)*N
Total Configuration Time = Total Clock Cycle/ PFL Input Clock
- Substitute these values in the following formulas:
Caccess = (100ns * 100MHz) + 1 = 11
Cflash = 11/2 = 5.5
Ccfg = 2
Coverhead = 3*11 = 33
Total Clock Cycles = 33 + 5.5 * 590848 = 3249697
Total Configuration Time at 100 MHz = 3249697/ 100 × 106 = 32.5ms
Page Mode
- Page mode configuration time calculation:
.rbf size for EP2S15 = 577 KB = 590,848 Bytes
Configuration mode = FPP without data compression or encryption
Flash access mode = Page Mode
Flash data bus width = 16 bits
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2
- Use the following formulas in this calculation:
Tpage_access = 30 ns
Caccess = [(Taccess*Fclk+1) + ((Tpage_access*Fclk+1)*15)]/16
Cflash for Page Mode = Caccess / 2
Ccfg = 2
Coverhead = 3* Caccess
Total Clock Cycles = Coverhead + max (Cflash, Ccfg)*N
Total Configuration Time = Total Clock Cycle/ PFL Input Clock
- Substitute these values in the following formulas:
Caccess = [((100ns * 100 MHz) + 1) + (30ns*100 MHz*15)]/16 = 3.5
Cflash for Page Mode = 3.5/ 2 = 1.75 = 2
Ccfg = 2
Coverhead = 3*3.5 = 10.5
Total Clock Cycles = 10.5 + 2*590848 = 1181706.5
Total Configuration Time at 100 MHz = 1181706.5 / 100 × 106 = 11.82 ms
Burst Mode
- Burst mode configuration time calculation:
.rbf size for EP2S15 = 577KB = 590,848 Bytes
Configuration mode = FPP without data compression or encryption
Flash access mode = Burst Mode
Flash data bus width = 16 bits
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2
- Use the following formulas in this calculation:
Caccess = Taccess*Fclk+1
Cflash for Burst Mode = 1
Ccfg = 2
Coverhead = 20* Caccess + 8
Total Clock Cycles = Coverhead + max (Cflash, Ccfg)*N
Total Configuration Time = Total Clock Cycle/ PFL Input Clock
- Substitute these values in the following formulas:
Caccess = (100ns * 100 MHz) + 1 = 11
Cflash = 1
Ccfg = 2
Coverhead = (20*11)+8 = 228
Total Clock Cycles = 228 + 2 * 590848 = 1181924
Total Configuration Time at 100 MHz = 1181924 / 100 × 106 = 11.82 ms
Single Quad SPI Flash
- Single quad SPI flash configuration time calculation
.rbf size for EP2S15 = 577KB = 590,848 Bytes
Configuration mode = FPP without data compression or encryption
Flash access mode = Burst Mode
Flash data bus width = 4 bits (only one quad SPI flash is used)
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2
- Use the following formulas in this calculation:
Cflash = 4
Ccfg = 2
Coverhead = 48
Total Clock Cycles = Coverhead + max (Cflash, Ccfg)*N
Total Configuration Time = Total Clock Cycle/ PFL Input Clock
- Substitute these values in the following formulas:
Cflash = 4
Ccfg = 2
Coverhead = 48
Total Clock Cycles = 48 + 4 * 590848 = 2363440
Total Configuration Time at 100 MHz = 2363440 / 100 × 106 = 23.63 ms
Four Cascaded Quad SPI Flashes
- Four cascaded quad SPI flashes configuration time calculation:
.rbf size for EP2S15 = 577KB = 590,848 Bytes
Configuration mode = FPP without data compression or encryption
Flash access mode = Burst Mode
Flash data bus width = 16 bits (total bus width for four quad SPI flashes)
Flash access time = 100 ns
PFL input Clock = 100 MHz
DCLK ratio = 2
The configuration time calculation for four cascaded quad SPI flash is identical to the configuration time calculation for CFI flash with 16 bit flash data width.
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