Parallel Flash Loader Intel® FPGA IP User Guide

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ID 683698
Date 7/23/2021
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Document Table of Contents
Document Table of Contents x
1. Parallel Flash Loader Intel® FPGA IP User Guide
1. Parallel Flash Loader Intel® FPGA IP User Guide x
1.1. Features 1.2. Device Support 1.3. Functional Description 1.4. Using the PFL IP Core 1.5. PFL IP Core In Embedded Systems 1.6. Third-party Programmer Support 1.7. Parameters 1.8. Signals 1.9. Specifications 1.10. Parallel Flash Loader Intel® FPGA IP User Guide Archives 1.11. Document Revision History for the Parallel Flash Loader Intel® FPGA IP User Guide
1.2. Device Support x
1.2.1. Supported Flash Memory Devices 1.2.2. Supported Schemes and Features
1.3. Functional Description x
1.3.1. Programming Flash Memory 1.3.2. Controlling Intel® FPGA Configuration from Flash Memory 1.3.3. Mapping PFL and Flash Address 1.3.4. Implementing Page in the Flash .pof 1.3.5. Using Enhanced Bitstream Compression and Decompression 1.3.6. Using Remote System Upgrade
1.3.1. Programming Flash Memory x
1.3.1.1. Programming CFI Flash 1.3.1.2. Programming Quad SPI Flash 1.3.1.3. Programming NAND Flash
1.3.4. Implementing Page in the Flash .pof x
1.3.4.1. Storing Option Bits
1.3.6. Using Remote System Upgrade x
1.3.6.1. Remote System Upgrade State Machine in the PFL IP Core 1.3.6.2. Implementing Remote System Upgrade with the PFL IP Core 1.3.6.3. User Watchdog Timer
1.4. Using the PFL IP Core x
1.4.1. Converting .sof Files to a .pof 1.4.2. Constraining PFL Timing 1.4.3. Simulating PFL Design 1.4.4. Programming Intel® CPLDs and Flash Memory Devices 1.4.5. Defining New CFI Flash Device 1.4.6. Programming Multiple Flash Memory Devices 1.4.7. Creating Jam Files for Intel® CPLDs and Flash Memory Device Programming
1.4.2. Constraining PFL Timing x
1.4.2.1. Constraining Clock Signal 1.4.2.2. Constraining Synchronous Input and Output Ports 1.4.2.3. Constraining Asynchronous Input and Output Ports, and Bidirectional Synchronous Ports 1.4.2.4. Summary of PFL Timing Constraints
1.4.3. Simulating PFL Design x
1.4.3.1. Creating a Test Bench File for PFL Simulation 1.4.3.2. Performing PFL Simulation in the ModelSim- Intel® FPGA Software 1.4.3.3. Performing PFL Simulation for FPGA Configuration
1.4.4. Programming Intel® CPLDs and Flash Memory Devices x
1.4.4.1. Programming Intel® CPLDs and Flash Memory Devices Separately
1.9. Specifications x
1.9.1. Configuration Time Calculation Examples
1. Parallel Flash Loader Intel® FPGA IP User Guide

1.4.5. Defining New CFI Flash Device

The PFL IP core supports Intel-compatible and AMD-compatible flash memory devices. In addition to the supported flash memory devices, you can define the new Intel- or AMD-compatible CFI flash memory device in the PFL-supported flash database using the Define new CFI flash memory device feature.
Note: User flash-defined information is stored in the Windows registry. Therefore, you must have the system administration (administrator) privileges in order to store the parameter in the Define New Flash Device window in the Intel® Quartus® Prime programmer.

To add a new CFI flash memory device to the database or update a CFI flash device in the database, follow these steps:

  1. In the Programmer window, on the Edit menu, select Define New CFI Flash Device. The Define CFI Flash Device window appears. The following table lists the three functions available in the Define CFI Flash Device window.
    Table 10.  Functions of the Define CFI Flash Device Feature
    Function Description
    New Add new Intel- or AMD-compatible CFI flash memory device into the PFL-supported flash database.
    Edit Edit the parameters of the newly added Intel- or AMD-compatible CFI flash memory device in the PFL-supported flash database.
    Remove Remove the newly added Intel- or AMD-compatible CFI flash memory device from the PFL-supported flash database.
  2. To add a new CFI flash memory device or edit the parameters of the newly added CFI flash memory device, select New or Edit. The New CFI Flash Device dialog box appears.
  3. In the New CFI Flash Device dialog box, specify or update the parameters of the new flash memory device. You can obtain the values for these parameters from the datasheet of the flash memory device manufacturer.
    Table 11.  Parameter Settings for New CFI Flash Device
    Parameter Description
    CFI flash device name Define the CFI flash name
    CFI flash device ID Specify the CFI flash identifier code
    CFI flash manufacturer ID Specify the CFI flash manufacturer identification number
    CFI flash extended device ID Specify the CFI flash extended device identifier, only applicable for AMD-compatible CFI flash memory device
    Flash device is Intel compatible Turn on the option if the CFI flash is Intel compatible
    Typical word programming time Typical word programming time value in µs unit
    Maximum word programming time Maximum word programming time value in µs unit
    Typical buffer programming time Typical buffer programming time value in µs unit
    Maximum buffer programming time Maximum buffer programming time value in µs unit
    Note: You must specify either the word programming time parameters, buffer programming time parameters, or both. Do not leave both programming time parameters with the default value of zero.
  4. Click OK to save the parameter settings.
  5. After you add, update, or remove the new CFI flash memory device, click OK.
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