Agilex™ 7 FPGAs and SoCs Device Overview

ID 683458
Date 4/01/2024
Document Table of Contents

1. Overview of the Agilex™ 7 FPGAs and SoCs

The Agilex™ 7 FPGA product family includes the highest performance FPGAs and SoCs in the industry. Comprising of the high-performance F-Series, I-Series, and M-Series FPGAs, the Agilex™ 7 FPGAs and SoCs provide a range of premium features for the most demanding applications.
  • Transceivers with the highest data rate in the industry—up to 116 Gbps
  • The industry's first PCI Express* ( PCIe* ) 5.0 and Compute Express Link* ( CXL* ) support
  • Options to integrate in-package HBM2E memory, delivering the highest memory bandwidth in the industry—over 1 terabytes per second (TBps).
  • System-in-package (SiP) chiplet architecture
    • Provides tailored and flexible solutions by integrating heterogeneous technologies in a SiP for highly-specific applications
    • Using advanced 3D packaging technology, such as the Embedded Multi-die Interconnect Bridge (EMIB), Intel combines the traditional FPGA die with purpose-built semiconductor chiplet in a single device package

The Agilex™ 7 FPGA product family delivers on average 50% higher fabric performance and up to 40% lower total power consumption compared to previous generation Intel® FPGAs. To achieve this improvement, the product family leverages these key innovations and techniques:

  • Advanced Intel® 10-nm SuperFin and Intel® 7 technologies
  • Second generation Hyperflex® FPGA architecture
  • High level of system integration
  • SmartVID standard power devices
  • Power islands, power gating, and other power reduction techniques

These capabilities and advanced features enable customized connectivity and acceleration for the most compute-intensive, bandwidth-intensive, and memory-intensive applications. The applications span across many segments including communications, high-performance computing, video and broadcast equipments, high-end test and measurement, medical electronics, data centers, and defense.

Note: The information contained in this document is preliminary and subject to change.