20. Power Management for Intel Agilex® 7 FPGAs and SoCs
The Intel Agilex® 7 FPGAs and SoCs achieve up to 40% total power reduction compared to the previous generation Intel® Stratix® 10 FPGAs.
To achieve the total power reduction, the Intel Agilex® 7 FPGAs and SoCs capitalizes on:
- Advanced Intel® 10-nm SuperFin or Intel® 7 technology
- Second generation Intel® Hyperflex™ core architecture
- SmartVID or fixed core voltage
- Other power reduction techniques such as power island and power gating
The power island and power gating feature powers down unused resources in Intel Agilex® 7 devices to reduce static power consumption. During configuration, the Intel® Quartus® Prime software automatically powers down specific unused resources such as the DSP or M20K blocks.
Furthermore, Intel Agilex® 7 devices feature industry-leading low power transceivers and include a number of hard IP blocks. The hard IP blocks not only reduce logic resources utilization but also deliver substantial power savings compared to soft implementations. The hard IP blocks generally consume up to 50% less power than equivalent soft logic implementations.