Agilex™ 7 FPGAs and SoCs Device Overview

ID 683458
Date 10/31/2023
Public
Document Table of Contents

5. Internal Embedded Memory in Intel Agilex® 7 FPGAs and SoCs

The MLAB and M20K embedded memory blocks in Intel Agilex® 7 FPGAs and SoCs are similar to the embedded memory of previous generation Intel® FPGAs. Additionally, some Intel Agilex® 7 FPGAs also feature eSRAM blocks with stitching support.
Table 21.  Embedded Memory Block Types and Features for Intel Agilex® 7 FPGAs and SoCs
Feature MLAB M20K eSRAM32
Usage For wide and shallow memory configurations For supporting larger memory configurations For large memory configurations with fast path, low latency, and high bandwidth on-chip memory
Block size 640 bits 20 kilobits 18 Megabits
Configurations
  • 64×10 (emulated)
  • 32×20
  • 2,048×10 (or ×8)
  • 1,024×20 (or ×16)
  • 512×40 (or ×32)
  • 8 channels of 2.25 Mb (18 Mb)
  • Each channel contains 32 banks of 72×1K memory
Hard ECC Yes Yes
Modes Single-port RAM, dual-port RAM, FIFO, ROM, and shift register
32 Available in F-Series and I-Series FPGAs.