Intel® Agilex™ FPGA and SoC

Intel® Agilex™ FPGA devices leverage heterogeneous 3D system-in-package (SiP) technology to integrate Intel’s first FPGA fabric built on 10nm SuperFin Technology and 2nd Gen Intel® Hyperflex™ FPGA Architecture to deliver up to 45% higher performance (geomean vs. Intel® Stratix® 10)1 or up to 40% lower power1 for applications in data center, networking, and edge compute. When compared to our competition’s 7nm FPGA portfolio, Intel® Agilex™ delivers ~2X better fabric performance per watt.1 Intel® Agilex™ SoC FPGA devices also integrate the quad-core Arm* Cortex-A53 processor to provide high system integration.

Read more about Intel® Agilex™ FPGA architecture ›

Read the Intel® Agilex™ FPGA product brief ›

Intel® Agilex™ FPGA and SoC

Coming Soon - Intel® Agilex™ M-Series SoC FPGAs

Optimized for compute and memory intensive applications. With Coherent attach to Intel® Xeon® processors, HBM integration, hardened DDR5 controller, and Intel® Optane™ DC persistent memory support the Intel® Agilex™ M-Series SoC FPGAs are optimized for data-intensive applications which need massive memory in addition to high bandwidth.

Breakthrough FPGA News from Intel

Intel® Agilex™ FPGA devices deliver ~2X better fabric performance per watt versus 7nm FPGAs,1 especially useful for applications needing flexibility, agility, and high performance such as edge computing, networking, and cloud or data-center accelerators.

Read product brief

Features

Compute Express Link

With the Compute Express Link, Intel® Agilex™ FPGA, and SoC family offers the industry’s first Cache and Memory coherent interconnect to Intel® Xeon® processors. This revolutionary FPGA interconnect will provide low latency and performance gains for memory intensive applications with massive data processing needs.

Transceiver Leadership

Intel® Agilex™ FPGA and SoC family delivers accelerated transceiver innovation with data rates up to 116Gbps and support for PCI Express* up to Gen 5. Intel® Agilex™ FPGA and SoC family will allow customers to choose from a comprehensive transceiver portfolio of 28.3Gbps, 58Gbps, and 116Gbps transceiver tiles. Decoupling the transceiver development accelerates product innovation.

DSP Innovation

Intel® Agilex™ FPGA and SoC family offers a configurable DSP engine which features hardened support for single-precision FP32, half-precision FP16, BFLOAT16, and INT8 calculations. Intel® Agilex™ FPGA and SoC family also supports low- precision configurations from INT7 to INT2 for maximum flexibility. Intel® Agilex™ FPGA programmability, coupled with the innovations in the DSP blocks is ideal for evolving AI workloads.

Heterogeneous 3D SiP Technology

With the proven Embedded multi-die Interconnect Bridge (EMIB) technology, Intel® Agilex™ FPGA, and SoC family offers high density die-to-die interconnect for heterogeneous chips and delivers high performance at low cost. A large library of tiles including transceivers, custom IO, custom compute, and Intel® eASIC™ device tiles provide the agility, flexibility, and customization needed for a variety of applications.

Hardened Protocol Support

Intel® Agilex™ FPGA and SoC family delivers optimal power, performance, and logic utilization efficiency by integrating hardened protocols for many popular functions including 100/200/400G Ethernet, PCIe* Gen 4/5 interface, Interlaken, CPRI, JESD204B/C, and many more.

Memory Integration

Intel® Agilex™ FPGA and SoC family features the industry’s first FPGA support for Intel® Optane™ DC persistent memory. In addition to this, HBM integration allows up to 16GB of external memory to be offered in-package affording up to 512 GB/s of peak memory bandwidth. Dedicated DDR5/4 hard memory controllers will support further on-board DRAM memory expansion.

2nd Gen Intel® Hyperflex™ Architecture

Continuous improvements to the acclaimed Intel® Hyperflex™ architecture deliver improved performance compared to Intel® Stratix® 10 device designs. The 2nd Gen Intel® Hyperflex™ architecture will be extended to all densities and variants of Intel® Agilex™ FPGA and SoC family and thus greatly improve the productivity of customers and reduce time-to-market.

Secure Device Manager

A Secure Device Manager will serve as the central command center for the entire FPGA, controlling key operations, such as configuration, device security, single event upset (SEU) responses, and power management. The Secure Device Manager creates an unified, secure management system for the FPGA fabric, hard processor system (HPS) in SoCs, embedded hard IP blocks, and I/O blocks.

Documentation and Support

Find technical documentation, videos, and training courses for your Intel® Agilex™ device designs.

Videos

116G PAM4 Transceivers Video

Intel® Agilex™ FPGA and SoC FPGA devices offer new levels of performance using Intel’s Advanced 10nm SuperFin Technology. 116Gbps serial transceiver links support demanding bandwidth requirements in next-generation data center, enterprise, and networking environments.

Introduction to First Shipping Intel® Agilex™ FPGA

Watch this video introducing the power-on and initial operational results of the first FPGA for the data-centric world.

Intel® Agilex™ Device PCIe* Gen4 x16 Demo

Watch this demo of PCIe* Gen4 x16 operation in the first Intel® Agilex™ device.

Intel® Agilex™ Device DDR4 Demo

Watch this demo video of the Intel® Agilex™ device with DDR4 in action.

Intel® Agilex™ Device 100G Ethernet Demo

Watch a demonstration of first Intel® Agilex™ device delivering 100G Ethernet capability.

Intel® Agilex™ SoC FPGA Hard Processor System (HPS) Demo

See the Hard Processor System (HPS) in the first Intel® Agilex™ SoC boot up with Linux.

Intel® Agilex™ FPGA and SoC Architecture

Significant architectural improvements, DSP innovations, and fundamental changes in routing and layout combine to deliver up to 40% higher performance2 or 40% lower power2 with the Intel® Agilex™ FPGA and SoC family. Checkout the video to learn more!

Intel® Agilex™ FPGA 58G XCVR Transceiver Demo

See the transceiver performance of the first Intel® Agilex™ FPGA delivering 58G data rates.

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex​.

Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available ​updates. See backup for configuration details. No product or component can be absolutely secure.

Your costs and results may vary.

2

This Comparison based on Intel® Agilex™ FPGA and SoC family vs. Intel® Stratix® 10 FPGA using simulation results and is subject to change. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications, and roadmaps.

Intel® technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Software and workloads used in performance tests may have been optimized for performance only on Intel® microprocessors.

Intel, the Intel logo, Atom, Xeon, and others are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others.
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