DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/20/2022

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7.2.23. Variable-Size Low-Resource FFT

This design example implements a low data-rate, low-resource usage FFT suitable for applications such as vibration suppression. The maximum size of the FFT is 4K points. The actual size of each FFT iteration may be any power of 2 that is smaller than 4K points. You dynamically control the size using the size input. Irrespective of the size of the FFT, a new FFT iterates whenever it receives an additional 64 inputs. Successive FFT iterations usually use overlapping input data.

The FFT accepts 16-bit fixed-point inputs. The FFT produces block floating-point output using an 18-bit mantissa and a shared 6-bit exponent.

This FFT implementation is unusual because the FFT gain is 1. Therefore the sum-of-squares of the input values is equal (allowing for rounding errors) to the sum-of-squares of the output values.

This method of scaling gives two advantages:

  • The exponent can be smaller.
  • The output remains consistently scaled when the FFT dynamic size changes.

To configure the design example, edit any of the parameters in the setup file.

The model file is demo_servofft.mdl.