DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 6/20/2022

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Document Table of Contents

4.4.1. Software Model Options

You configure software model generation on the Simulation tab on the Control Block under the Software model generation header.
Table 6.  Software Model Options
Option Description
Enabled Turns the software model generation on or off.

Determines the behavior of the generated model, either Bit Accurate or Bit And Cycle Accurate. This option is independent of the simulation mode for the Simulink simulation, although the internal model is the same. For details on the Simulink simulation mode and the differences between 'Bit Accurate' and 'Bit And Cycle Accurate' simulation, refer to Simulation Mode Selection.

Compiler This option is deprecated and nonfunctional as of version 22.2.
Figure 26. Software Model Options