DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
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10.1.2. DPTX_TX_STATUS

The IP issues an IRQ to the Nios II processor if the DPTX_TX_CONTROL registers HPD_IRQ_EN is 1 and the IP detects a new HPD event. HPD_EVENT provides information about the event that caused the interrupt. The interrupt and HPD_EVENT bit fields are both cleared by writing to the DPTX_TX_STATUS register.

Address: 0x0001

Direction: CRO

Reset: 0x00000000

Table 63.  DPTX_TX_STATUS Bits

Bit

Bit Name

Function

31:4

Unused

3

RESERVED

Reserved

2

HPD_LEVEL

Current HPD logic level

1:0

HPD_EVENT

HPD event causing IRQ (write to clear):

  • 00 = No event
  • 01 = HPD plug event (long HPD)
  • 10 = HPD IRQ (short HPD)
  • 11 = Reserved