DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
Public

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10.3.6. DPTX_TEST_80BIT_PATTERN1/DPTX_TEST_264BIT_PATTERN1

Address: 0x0015

Direction: RW

Reset: 0x00000000

Table 86.  DPTX_TEST_80BIT_PATTERN1 Bits

Bit

Bit Name

Function

31:0

80BIT_PATTERN1

Bits 31:0 of the 80 bit custom pattern for PHY compliance test.

Bits 31:0 of the 264 bit custom pattern for PHY compliance test.