DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
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11.9.2. DPRX_AUX_STATUS

AUX transaction status register, DPRX_AUX_STATUS.

Address: 0x0101

Direction: RO

Reset: 0x00000000

Table 201.  DPRX_AUX_STATUS Bits

Bit

Bit Name

Function

31

MSG_READY

0 = Waiting for a request

1 = Receives a request

30

READY_TO_TX

0 = Busy sending a reply or waiting for a request

1 = Ready to send a reply

29:2

Unused

1

SRC_PWR_DETECT

0 = Upstream power not detected

1 = Upstream power detected

0

SRC_CABLE_DETECT

0 = Upstream cable not detected

1 = Upstream cable detected