Intel® SoC FPGA Embedded Development Suite (SoC EDS) User Guide

ID 683187
Date 2/03/2025
Public
Document Table of Contents

11. Linux* Device Tree Generator

A device tree is a data structure that describes the underlying hardware to an operating system—primarily Linux*. By passing this data structure to the OS kernel, a single OS binary may be able to support many variations of hardware. This flexibility is particularly important when the hardware includes an FPGA.

The Linux* Device Tree Generator (DTG) tool is part of SoC FPGA EDS and is used to create Linux* device trees for the Cyclone® V SoC, Arria® V SoC, and Arria® 10 SoC systems that contain FPGA designs created using the Platform Designer. The generated device tree describes the HPS peripherals, selected FPGA Soft IP, and peripherals that are board dependent. The Arria® 10 SoC Bootloader also has an associated Device Tree called Bootloader Device Tree that is created and managed by the BSP Editor tool.

Warning: The Linux* Device Tree Generator is obsolete and does not support Stratix® 10 SoC and newer devices. However, it is tested with and supports only the Linux* kernel version targeted by the associated GSRD. Altera does not recommend that you use the Linux* Device Tree Generator if your design targets a different Linux* kernel version. Instead, Altera recommends that you manage the Device Tree manually by using the Device Tree files provided by the kernel as a baseline, and by adding the FPGA IP and board information manually.

Refer to HOWTO Create A Device Tree, which supports all kernels.