18.104.22.168. Intel® Arria® 10 SoC Flow
The next step is to clone the U-Boot source code from GitHub, and copy the generated device tree into U-Boot source code. For complete instructions, go to the Building Bootloader web page on RocketBoards.org. Then the U-Boot is compiled using the make utility and it creates the combined bootloader image, which contains both the bootloader executable and the bootloader device tree. You can download the combined image to a Flash device or FPGA RAM to use for booting the HPS.
The hardware handoff information contains various settings that you entered when creating the hardware design in Platform Designer.. These include the following:
- Pin-muxing for the HPS dedicated pins
- I/O settings for the HPS dedicated pins:
- Slew rate
- Pull up/ down
- Pin-muxing for the shared pins
- Configuration of the bridges between HPS and FPGA
- Clock tree settings:
- PLL settings
- Clock divider settings
- Clock gating settings
The handoff settings are output from the Intel® Quartus® Prime Standard Edition compilation and are located in the <quartus project directory>/hps_isw_handoff directory.
The user must run the BSP Generator and re-generate the Bootloader device tree each time a hardware change results in a change of the above parameters.
However, you does not have to always recompile the Bootloader whenever a hardware setting is changed. The Bootloader needs to be recompiled only when changing the boot source.