Intel® SoC FPGA Embedded Development Suite User Guide

ID 683187
Date 8/07/2020
Public
Download
Document Table of Contents

8.3.1. HPS Flash Programmer

The HPS flash programmer utility can erase, blank-check, program, verify, and examine the flash. The utility accepts a Binary File with a required ".bin" extension.

The HPS flash programmer command-line syntax is:

quartus_hps <options> <file.bin>
Note: The HPS flash programmer uses byte addressing.
Table 6.  HPS Flash Programmer Parameters
Option Short Option Required Description
--addr -a

Yes (if the start address is not 0)

This option specifies the start address of the operation to be performed.

--cable -c

Yes

This option specifies what download cable to use.

To obtain the list of programming cables, run the command "jtagconfig". It lists the available cables, like in the following example:
jtagconfig
  • Intel® FPGA Download Cable [USB-0]
  • Intel® FPGA Download Cable [USB-1]
  • Intel® FPGA Download Cable [USB-2]
The "-c" parameter can be the number of the programming cable, or its name. The following are valid examples for the above case:
  • -c 1
  • -c " Intel® FPGA Download Cable [USB-2]"
--device -d

Yes (if there are multiple HPS devices in the chain)

This option specifies the index of the HPS device. The tool automatically detects the chain and determine the position of the HPS device; however, if there are multiple HPS devices in the chain, the targeted device index must be specified.

--boot N/A Yes

Option to reconfigure the HPS IOCSR and PINMUX before starting flash programming.

For the Intel® Quartus® Prime HPS Flash Programmer options:
  • Warm/cold reset HPS (BootROM) so that BootROM can reconfigure the setting.

    FPGA (for Intel® Arria® 10 SoC) is nconfig.

  • Explicitly configure dedicated I/O and PINMUX
Available options:
  • 1 - Set Breakpoint to halt CPU, warm reset HPS [not recommended]2
  • 2 - Set Watchpoint to halt CPU, warm reset HPS3
  • 3 - Explicitly configure dedicated IO and PINMUX4
  • 16 - Cold reset HPS5

Cyclone® V SoC and Intel® Arria® 10 SoC support values: 1, 2 and 16.

Intel® Arria® 10 SoC supports values: 2, 3 and 16
Note: For the first three options, add up integer of 16, so that the HPS cold reset is performed
Available options for a cold reset before the flow:
  • 17 - Cold reset HPS + breakpoint6
  • 18 - Cold reset HPS + watchpoint7
  • 19 - Cold reset HPS + configure dedicated IO and PINMUX8
--exit_xip N/A Yes (if the QSPI flash device has been put into XIP mode) This option exits the QSPI flash device from XIP mode. A non-zero value has to be specified for the argument. For example, quartus_hps -c <cable> -o <operation> --exit_xip=0x80.
--operation -o

Yes

This option specifies the operation to be performed. The following operations are supported:

  • I—Read IDCODE of SOC device and discover Access Port
  • S—Read Sislicon ID of the flash
  • E—Erase flash
  • B—Blank-check flash
  • P—Program flash
  • V—Verify flash
  • EB—Erase and blank-check flash
  • BP—Program <BlankCheck> flash
  • PV—Program and verify flash
  • BPV—Program (blank-check) and verify flash
  • X—Examine flash
Note: The program begins with erasing the flash operation before programming the flash by default.
--size -s

No

This option specifies the number of bytes of data to be performed by the operation. size is optional.

Note: The following options: repeat and interval must be used together and are optional.

The HPS BOOT flow supports up to four images where each image is identical. These options duplicate the operation data; therefore you do not need embedded software to create a large file containing duplicate images.

--repeat -t No repeat—specifies the number of duplicate images for the operation to perform.
--interval -i No interval—specifies the repeated address. The default value is 64 kilobytes (KB).
2 Warm reset HPS for BootROM to configure dedicated IO and PINMUX, and use a breakpoint to halt CPU.
3 Warm reset HPS for BootROM to configure dedicated IO and PINMUX, and use a watchpoint to halt CPU.
4 Explicitly configure dedicated IO and PINMUX.
5 Bit-wise on top of the flow, if you set the bit, the tool will perform cold reset first
6 Cold reset HPS for BootROM to configure dedicated IO and PINMUX, and use a breakpoint to halt CPU.
7 Cold reset HPS for BootROM to configure dedicated IO and PINMUX, and use a watchpoint to halt CPU.
8 Cold reset HPS, then explicitly configure dedicated IO and PINMUX.