Intel® SoC FPGA Embedded Development Suite User Guide

ID 683187
Date 8/07/2020
Public
Document Table of Contents

6.3.4.3. Address Alignment

For Cyclone® V SoC and Arria® V SoC, every Preloader image has to be aligned to a 64KB boundary, except for NAND devices. For NAND devices, each Preloader image has to be aligned to the greater of 64 KB or NAND block size.

For Intel® Arria® 10 SoC, every Bootloader image has to be aligned to a 256 KB boundary, except for NAND devices. For NAND devices, each Bootloader image has to be aligned to the greater of 256 KB or NAND block size.

The following tables present typical image layouts, that are used for QSPI, SD/MMC and NAND devices with NAND erase block size equal or less to 64 KB (for Cyclone® V SoC/ Arria® V SoC) or 256 KB (for Intel® Arria® 10 SoC).

Table 4.  Typical Arria® V SoC/ Cyclone® V SoC Preloader Image Layout

Offset

Image

0x30000

Preloader Image 3

0x20000

Preloader Image 2

0x10000

Preloader Image 1

0x00000

Preloader Image 0

Table 5.  Typical Intel® Arria® 10 SoC Bootloader Image Layout

Offset

Image

0xC0000

Bootloader Image 3

0x80000

Bootloader Image 2

0x40000

Bootloader Image 1

0x00000

Bootloader Image 0

The mkpimage tool is unaware of the target flash memory type. If you do not specify the block size, the default is 64 KB.

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