Intel® SoC FPGA Embedded Development Suite User Guide

ID 683187
Date 8/07/2020
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6.5.3. Building the Intel® Stratix® 10 SoC and Intel® Agilex™ Devices

On Intel® Stratix® 10 SoC and Intel® Agilex™ devices, the SDM loads the FSBL from the configuration bitstream. The configuration bitstream contains the hardware handoff data, which is made available to the FSBL. Because of this, there is no need for a Bootloader Generator tool to pass additional information to the Bootloader building process.

For information about how to build the Intel® Stratix® 10 SoC U-Boot, refer to the Building Bootloader webpage on RocketBoards.

For information about ATF and UEFI, refer to Intel® Stratix® 10 SoC UEFI Boot Loader User Guide.

For information about the Intel® Stratix® 10 SoC bootloaders, refer to the Intel® Stratix® 10 SoC FPGA Boot User Guide.