Direct Interface Bus (DIB) Intel® Stratix® 10 FPGA IP User Guide
ID
683142
Date
3/18/2021
Public
1. About the DIB Intel® Stratix® 10 FPGA IP User Guide
2. About the DIB Intel® Stratix® 10 FPGA IP
3. Functional Description
4. Creating and Parameterizing the Intel FPGA IP
5. Designing with the DIB Intel® Stratix® 10 FPGA IP
6. DIB Intel® Stratix® 10 FPGA IP Interface
7. DIB Intel® Stratix® 10 FPGA IP Parameters
8. Document Revision History for the DIB Intel® Stratix® 10 FPGA IP User Guide
A. Die-to-Die Mapping
B. Example Pin Locations for One DIB Channel
4. Creating and Parameterizing the Intel FPGA IP
Use the Intel FPGA IP design flow to get started with the DIB Intel® Stratix® 10 FPGA IP.
The Intel FPGA IP Library is installed as part of the Intel® Quartus® Prime installation process. You can select and parameterize any Intel FPGA IP from the library. Intel provides an integrated parameter editor that allows you to customize the DIB Intel® Stratix® 10 FPGA IP to support a wide variety of applications. The parameter editor guides you through the setting of parameter values and selection of optional ports.