5.2.1. Clocking Options
Clocking Option 1
All three DIB subsystems are clocked by a single IOPLL.
The clock network for this option is larger because the network spans across the die height.
- The divergence point is closer to the DIB subsystem because it is from a single PLL.
- For timing closure, you need to account for clock uncertainties from the divergence point to the leaf.
- No clock uncertainties occur when using multiple IOPLLs.
Clocking Option 2
Each DIB subsystem is clocked by its own PLL.
This option is more efficient if the logic clocked by one IOPLL is not required to interact with the logic clocked by another IOPLL. Cross-PLL interactions incur larger clock uncertainties.
- In this case, the clock network span from the divergence point to the leaves is shorter because the network does not need to span across the die height.
- This option also incurs less clock uncertainties.