Intel® Quartus® Prime Pro Edition User Guide: Design Recommendations

ID 683082
Date 8/03/2023
Document Table of Contents State Machine Power-Up

In Intel® Stratix® 10 devices, registers do not necessarily power-up in the same clock cycle if they are not in the same sector. This fact can cause issues with state machines if the state machine enters an undefined state.

One-hot encoded state machines are especially susceptible to this issue, as the number of undefined states is large compared to the number of legal states. Retiming also increases the risk of this issue because when state registers retime across logic or routing, it becomes more likely that the different state registers of one state machine are in different sectors.

To mitigate this risk, the Compiler automatically uses Safe State Machine for any state machine of 6 or less states for Intel® Stratix® 10 designs. This Safe State Machine setting forces the state machines back into the reset state if they enter an undefined state. The Compiler does not automatically use Safe State Machine for state machines of more than 6 states, or for Intel® Arria® 10 or Intel® Cyclone® 10 GX devices, because the effect on the quality of results can be significant.