Intel® Quartus® Prime Pro Edition User Guide: Design Recommendations

ID 683082
Date 8/03/2023
Document Table of Contents

1.6.5. Multiplexer HDL Guidelines

Multiplexers form a large portion of the logic utilization in many FPGA designs. By optimizing your multiplexer logic, you ensure the most efficient implementation.

This section addresses common problems and provides design guidelines to achieve optimal resource utilization for multiplexer designs. The section also describes various types of multiplexers, and how they are implemented.

For more information, refer to the Advanced Synthesis Cookbook.