Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
Document Table of Contents
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2.5.11. SDM Shared I/O Requirements

The Avalon® streaming interface ×16 and ×32 configuration modes use the configuration pins located in a GPIO-B bank for device configuration. The VCCIO_PIO voltage rail, instead of the VCCIO_SDM voltage rail, powers the GPIO-B bank.

When you use Avalon® streaming interface ×16 or ×32 configuration scheme, Avalon® streaming interface pins in the SDM shared IO bank are not usable as user I/Os for:

  • Designs that use external partial reconfiguration, for example, designs that send partial reconfiguration bitstream using Avalon® streaming interface pins.
  • Designs that use the HPS.