Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
Document Table of Contents

7.2. Programmable De-Emphasis

To compensate for signal degradation over long transmission path, you can alter the signal amplitude through the programmable de-emphasis feature.
Table 61.  Programmable De-Emphasis Feature Description
Item Description
Availability

Available for the following I/O standards:

  • SSTL-12 and Differential SSTL-12
  • HSTL-12 and Differential HSTL-12
  • HSUL-12 and Differential HSUL-12
  • POD 11 and Differential POD11
  • POD12 and Differential POD12
  • LVSTL11 and Differential LVSTL11
  • LVSTL105 and Differential LVSTL105
  • LVSTL700 and Differential LVSTL700
  • SLVS-400
Implementation

Two-tap de-emphasis implementation:

  • A main tap
  • A delayed post tap at 1 UI
Behavior

If turned on, the feature attenuates the I/O signal height, when the symbol is longer than 1 UI.

Types
  • Constant impedance de-emphasis:
    • Provides double the effective equalization level of the low power de-emphasis.
    • Three equalization settings: low, medium, and high.
  • Low power de-emphasis:
    • Three equalization settings: low, medium, and high.
Recommendations
  • The de-emphasis effect reduces eye height. If you use a non-default de-emphasis setting, perform an IBIS or HSPICE simulation to estimate the I/O buffer's electrical performance.
  • To get the optimal setting for your design, start the simulation with the lowest de-emphasis setting. Then, fine-tune the setting until you get the best signal integrity condition.
Figure 47. De-Emphasis Off: Signal Attenuation for Supported I/O Standards


Figure 48. Constant Impedance De-Emphasis: Signal Attenuation for Supported I/O Standards


Figure 49. Low Power De-Emphasis: Signal Attenuation for Supported I/O Standards