Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
Document Table of Contents
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2.4.1.1.2. RT OCT

The M-Series devices support RT OCT with and without calibration. RT OCT is available only for input and bidirectional pins. Output pins do not support RT OCT.

You must disable RT OCT for interfaces that require external termination circuitry near the receiver of the M-Series device.

Table 13.  RT OCT Schemes
OCT Scheme Description
RT OCT without calibration
  • Available only on the input buffer.
  • Receiver impedance matching provides the receiver with a controlled input impedance that closely matches the impedance of the transmission line.
RT OCT with calibration
  • The RT OCT calibration circuit uses the impedance of the external resistor connected to the RZQ pin as a reference.
  • During calibration, the circuit continuously alters the impedance of the I/O buffer until the value reaches the target impedance, which is a predetermined ratio to the reference resistance.
  • The calibration occurs at the end of the device configuration. When the calibration circuit finds the correct impedance, the circuit stops changing the characteristics of the drivers.
  • In EMIF mode, you may trigger recalibration during user mode.
Figure 9. RT OCT with Calibration
Table 14.  Selectable I/O Standards for RT OCT with CalibrationThis table lists the output termination settings for calibrated OCT on different I/O standards. The default values are in bold font.
I/O Standard RT OCT without Calibration6 (Ω) RT OCT with Calibration (Ω)
1.3 V LVCMOS
1.2 V LVCMOS
1.1 V LVCMOS
1.05 V LVCMOS
SSTL-12 50 50, 60
HSTL-12 50 50, 60
HSUL-12
POD12 50 40, 50, 60
POD11 50 40, 50, 60
LVSTL11 50 40, 50, 60
LVSTL105 50 40, 50, 60
LVSTL700 40, 50, 60
Differential SSTL-12 50 50, 60
Differential HSTL-12 50 50, 60
Differential HSUL-12
Differential POD12 50 40, 50, 60
Differential POD11 50 40, 50, 60
Differential LVSTL11 50 40, 50, 60
Differential LVSTL105 50 40, 50, 60
Differential LVSTL700 40, 50, 60
6 Supported only in GPIO mode.