Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
Document Table of Contents

2.3. GPIO-B Implementation Guide

The Intel® Quartus® Prime software provides tools for you to create, configure and compile your I/O design. Each tool provides different functions and supports different features to implement your I/O design.
Table 8.   Intel® Quartus® Prime I/O Implementation Tools
Tool Functions

Supported Assignment

Supported I/O Standards
Assignment Editor
  • View, create and edit assignments.
  • The Intel® Quartus® Prime software:
    • Dynamically validates your edits.
    • Notify you of errors and warnings of invalid assignments.
  • Programmable slew rate control
  • Programmable I/O delay
  • Programmable weak pull-up resistor
  • Programmable pre-emphasis
  • Programmable de-emphasis
  • Programmable VOD
  • OCT
  • Receiver equalization
  • Fast input register
  • Fast output enable register
  • Fast output register
  • 1.3 V LVCMOS
  • 1.2 V LVCMOS
  • 1.1 V LVCMOS
  • 1.05 V LVCMOS
  • SSTL-12
  • HSTL-12
  • HSUL-12
  • POD12
  • POD11
  • LVSTL11
  • LVSTL105
  • LVSTL700
  • Differential SSTL-12
  • Differential HSTL-12
  • Differential HSUL-12
  • Differential POD-12
  • Differential POD11
  • Differential LVSTL11
  • Differential LVSTL105
  • Differential LVSTL700
  • SLVS-400
  • True Differential Signaling
Pin Planner
  • Graphically represent pin locations on the device.
  • With this tool, you can:
    • Perform initial pin planning.
    • Locate, place, and assign I/O pins.
    • Configure board trace models for pins you select for signal integrity evaluations.
  • Programmable slew rate control
  • Programmable weak pull-up resistor
  • OCT
  • Fast input register
  • Fast output enable register
  • Fast output register
  • Board trace model
GPIO Intel® FPGA IP
  • Instantiate the IP.
  • Customize your IP instance using parameters options.
  • SDR transfer
  • DDIO transfer
  • Output enable