Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
Document Table of Contents

2.2.2. GPIO-B Buffer Behavior

Table 3.   GPIO-B Pins Guideline for Different Pin States
GPIO-B Pin State
Not turned on Powering up Fully powered up Configuration mode User mode Powering down

Either tri-state the pins or do not drive them with any external voltage.

  • Pin voltage must not exceed VCCIO_PIO or 1.2 V, whichever is lower.
  • After full VCCIO_PIO power up, the pins are tri-stated with weak pull-up enabled.

All pins are tri-stated with weak pull-up enabled.

All pins are tri-stated with weak pull-up enabled.

Valid data transactions can be initiated.

  • Pin voltage must not exceed VCCIO_PIO or 1.2 V, whichever is lower.
  • When the VCCIO_PIO and VCC power rails are powering down, the I/O pin signals measure between ground and the VCCIO_PIO voltage levels.
Note: After the M-Series devices fully power up, input signals of the I/O pins must not exceed the maximum DC input voltage specified in the device data sheet.