Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 12/04/2023
Public
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6.4.4. Data Interface Signals and Corresponding Clocks

Table 52.  Data Interface Signals and Corresponding Clocks
Parameter Configuration Signal Name Clock Signal Name
Separate input/output Clocks Register mode
Off
  • Simple Register
  • DDIO
  • din
  • dout
  • oe
  • All pad signals
ck
DDIO
  • sclr
  • sset
On
  • Simple Register
  • DDIO
din ck_in
  • dout
  • oe
ck_out
All pad signals
  • Input path: ck_in
  • Output path: ck_out
DDIO
  • sclr
  • sset
  • Input path: ck_in
  • Output path: ck_out