5.1.1. LVDS SERDES IP Core General Settings
|Duplex Feature||On, Off||Turn on to allow transmitter and receiver channels in the same I/O bank.
Specifies the functional mode of the interface.
The TX option is not available if you turn on the Duplex Feature option. In duplex mode, transmitter channels are created by default.
|Number of channels||
Specifies the number of serial channels in the interface.
For an LVDS RX design, place the refclk pin on the same I/O bank as the receiver.
For an LVDS TX design:
In Duplex Feature mode, this value specifies the number of channels each for the transmitter and receiver. For example, if you specify 11 channels, the IP core uses 22 channels in the I/O bank.
|Data rate||150.0 to 1600.0||Specifies the data rate (in Mbps) of a single serial channel. The value is dependent on the Functional mode parameter settings.|
|SERDES factor||3, 4, 5, 6, 7, 8, 9, and 10||Specifies the serialization rate or deserialization rate for the LVDS interface.|
|Use backwards-compatible port names||On, Off||Turn on to use legacy top-level names that are compatible with the ALTLVDS_TX and ALTLVDS_RX IP cores.|
|Use the CPA block for improved periphery-core timing||On, Off||Turn on to improve timing closure between the periphery and core. The IP core uses the clock phase alignment (CPA) block to phase-align the core clock and load enable clock. The option is available for any selectable SERDES factor if:
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