Intel® Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 7/13/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.6. Guideline: LVDS SERDES Limitation for Intel® Stratix® 10 GX 400, SX 400, and TX 400

The LVDS SERDES Intel® FPGA IP does not support the following I/O banks:

  • Intel® Stratix® 10 GX 400 and SX 400 devices—I/O banks 3A, 3C, and 3D
  • Intel® Stratix® 10 TX 400 devices—I/O banks 3A and 3D

Did you find the information on this page useful?

Characters remaining:

Feedback Message