Intel® Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 7/13/2021

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5.1.5. LVDS SERDES IP Core Clock Resource Summary

The Clock Resource Summary tab lists the required frequencies, phase shifts, and duty cycles of the required clocks, and instructions for connections. You can refer to this tab for information about configuring and connecting an external PLL to the LVDS SERDES IP core.

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