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1. About Floating-Point IP Cores
2. FP_ACC_CUSTOM Intel® FPGA IP or Floating Point Custom Accumulator Intel® FPGA IP Core
3. ALTFP_ADD_SUB IP Core
4. ALTFP_DIV IP Core
5. ALTFP_MULT IP Core
6. ALTFP_SQRT
7. ALTFP_EXP IP Core
8. ALTFP_INV IP Core
9. ALTFP_INV_SQRT IP Core
10. ALTFP_LOG
11. ALTFP_ATAN IP Core
12. ALTFP_SINCOS IP Core
13. ALTFP_ABS IP Core
14. ALTFP_COMPARE IP Core
15. ALTFP_CONVERT IP Core
16. FP_FUNCTIONS Intel® FPGA IP or Floating Point Functions Intel® FPGA IP Core
17. Floating-Point IP Cores User Guide Document Archives
18. Document Revision History for the Floating-Point IP Cores User Guide
1.1. List of Floating-Point IP Cores
1.2. Installing and Licensing Intel® FPGA IP Cores
1.3. Design Flow
1.4. Upgrading IP Cores
1.5. Floating-Point IP Cores General Features
1.6. IEEE-754 Standard for Floating-Point Arithmetic
1.7. Non-IEEE-754 Standard Format
1.8. Floating-Points IP Cores Output Latency
1.9. Floating-Point IP Cores Design Example Files
1.10. VHDL Component Declaration
1.11. VHDL LIBRARY-USE Declaration
2.1. FP_ACC_CUSTOM Intel® FPGA IP or Floating Point Custom Accumulator Intel® FPGA IP Features
2.2. FP_ACC_CUSTOM Intel® FPGA IP or Floating Point Custom Accumulator Intel® FPGA IP Output Latency
2.3. FP_ACC_CUSTOM Intel® FPGA IP Resource Utilization and Performance
2.4. FP_ACC_CUSTOM Intel® FPGA IP or Floating Point Custom Accumulator Intel® FPGA IP Signals
2.5. FP_ACC_CUSTOM Intel® FPGA IP or Floating Point Custom Accumulator Intel® FPGA IP Parameters
15.1. ALTFP_CONVERT Features
15.2. ALTFP_CONVERT Conversion Operations
15.3. ALTFP_CONVERT Output Latency
15.4. ALTFP_CONVERT Resource Utilization and Performance
15.5. ALTFP_CONVERT Design Example: Convert Double-Precision Floating-Point Format Numbers
15.6. ALTFP_CONVERT Signals
15.7. ALTFP_CONVERT Parameters
16.1. FP_FUNCTIONS Intel® FPGA IP or Floating Point Functions Intel® FPGA IP Features
16.2. FP_FUNCTIONS Intel® FPGA IP or Floating Point Functions Intel® FPGA IP Output Latency
16.3. FP_FUNCTIONS Intel® FPGA IP or Floating Point Functions Intel® FPGA IP Target Frequency
16.4. FP_FUNCTIONS Intel® FPGA IP or Floating Point Functions Intel® FPGA IP Combined Target
16.5. FP_FUNCTIONS Intel® FPGA IP Resource Utilization and Performance
16.6. FP_FUNCTIONS Intel® FPGA IP Signals
16.7. FP_FUNCTIONS Intel® FPGA IP Parameters
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10.3. ALTFP_LOG Truth Table
This table lists the truth table for the natural logarithm operation.
6 The natural logarithm of a negative value is invalid. Therefore, the output produced is a NaN.
7 The “1” in this case is equivalent to In 1.
8 The value of positive denormalized numbers is a value that approximates zero, and the output produced is a negative infinity number.
9 The zero in this case represents zero special case of the IEEE standard. It is not equivalent to In 0, but instead approximates to it.
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