Floating-Point IP Cores User Guide

ID 683750
Date 10/27/2021
Public

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13.5. ALTFP_ABS Signals

Figure 36. ALTFP_ABS Signals
Table 75.  ALTFP_ABS Input Signals
Port Name Required Description
aclr No Asynchronous clear. When the aclr port is asserted high, the function is asynchronously cleared.
clk_en No Clock enable. When the clk_en port is asserted high, an absolute value operation takes place. When the signal is asserted low, no operation occurs and the outputs remain unchanged.
clock Yes Clock input to the IP core.
data[] Yes Floating-point input data. The MSB is the sign bit, the next MSBs are the exponent, and the LSBs are the mantissa. This input port size is the total width of sign bit, exponent bits, and mantissa bits.
zero_in No Zero exception input. Carry-through exception input port from other floating-point modules.
nan_in No NaN exception input. Carry-through exception input port from other floating-point modules.
overflow_in No Overflow exception input. Carry-through exception input port from other floating-point modules.
underflow_in No Underflow exception input. Carry-through exception input port from other floating-point modules.
division_by_zero_in No Division-by-zero exception input. Carry-through exception input port from other floating-point modules.
Table 76.  ALTFP_ABS Output Signals
Port Name Required Description
result[] Yes The absolute value result of the input data. The size of this port corresponds to the size of the input data[] port.
zero No Zero exception output carried from the input. Asserted if the corresponding carry-through port from the input is asserted.
nan No NaN output carried from the input. Asserted if the corresponding carry-through port from the input is asserted.
overflow No Overflow exception output carried from the input. Asserted if the corresponding carry-through port from the input is asserted.
underflow No Underflow exception output carried from the input. Asserted if the corresponding carry-through port from the input is asserted.
division_by_zero No Division-by-zero exception output carried from the input. Asserted if the corresponding carry-through port from the input is asserted.