Floating-Point IP Cores User Guide

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ID 683750
Date 9/13/2021
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5.7. ALTFP_MULT Signals

Table 31.  ALTFP_MULT IP Core Input Signals
Port Name Required Description
clock Yes Clock input to the IP core.
clk_en No Clock enable. Allows multiplication to take place when asserted high. When signal is asserted low, no multiplication occurs and the outputs remain unchanged.
aclr No Synchronous clear. Source is asynchronously reset when asserted high.
dataa[] Yes Floating-point input data input to the multiplier. The MSB is the sign, the next MSBs are the exponent, and the LSBs are the mantissa. This input port size is the total width of sign bit, exponent bits, and mantissa bits.
datab[] Yes Floating-point input data to the multiplier. The MSB is the sign, the next MSBs are the exponent, and the LSBs are the mantissa. This input port size is the total width of sign bit, exponent bits, and mantissa bits.
Table 32.  ALTFP_MULT IP Core Output Signals
Port Name Required Description
result[] Yes Output port for the multiplier. The floating-point result after rounding. The MSB is the sign, the next MSBs are the exponent, and the LSBs are the mantissa.
overflow No Overflow port for the multiplier. Asserted when the result of the multiplication, after rounding, exceeds or reaches infinity. Infinity is defined as a number in which the exponent exceeds 2WIDTH_EXP-1.
underflow No Underflow port for the multiplier. Asserted when the result of the multiplication (after rounding) is 0 while none of the inputs to the multiplication is 0, or asserted when the result is a denormalized number.
zero No Zero port for the multiplier. Asserted when the value of result[] is 0.
nan No NaN port for the multiplier. This port is asserted when an invalid multiplication occurs, such as the multiplication of infinity and zero. In this case, a NaN value is the output generated at the result[] port. The multiplication of any value and NaN produces NaN.

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