AN 704: FPGA-based Safety Separation Design Flow for Rapid Functional Safety Certification

ID 683720
Date 9/01/2018
Document Table of Contents

Exporting Safety IP Partition

Save the safety IP partition placement and routing information for use in any subsequent design modification flow. Saving the partition information enables you to import the project to a clean Intel® Quartus® Prime project where no previous compilation results exist.
  1. Right click on the partition DOC_Single_Axis_FE2H_CVE_DOC_Safe_PLL_DC_Link:doc_safe_pll_dc_link in the Design Partitions Window
  2. Select Export Design Partition…
    Note: Ensure that you turn on Post-fit netlist and Export routing and you turn off Post-synthesis netlist. Attempting to export a synthesis netlist for a safety IP partition gives an error.
  3. Click OK to export the partition, generating a Intel® Quartus® Prime exported partition file (.qxp).
  4. Repeat for the safety IP partition, ssg_emb_pwm:doc_pwm.