Design Hierarchy and safety IP partitions Preparing the Design Example in the Intel® Quartus® Prime Software DC Link Monitor safety IP partition Creating a Safety IP partition for the DC Link Monitor and PLL Subsystem Component Creating a Safety IP partition for the PWM Interface Component Creating a Safety IP LogicLock Region for the DC Link Monitor Creating a LogicLock Region for the PWM Interface Creating a Fixed Size and Origin for a LogicLock Region Removing Precomiled Netlists Using the Intel® Quartus® Prime Incremental Compilation Compiling the Design The Fitter Report Exporting Safety IP Partition Generating Safety IP Bitstream Files
Importing Safety IP Partition
- Right click on the partition DOC_Single_Axis_FE2H_CVE_DOC_Safe_PLL_DC_Link:doc_safe_pll_dc_link in the Design Partitions Window.
- Select Import Design Partition….
- Select the Intel® Quartus® Prime exported partition file, DOC_Single_Axis_FE2H_CVE_DOC_Saf.qxp, which you exported in step 1.
- Click OK to import the partition.
- Repeat for the safety IP partition, ssg_emb_pwm:doc_pwm.
By default the Intel® Quartus® Prime software keeps the previous compilation partition data in its database. Only perform the partition import step when you perform a clean Intel® Quartus® Prime compilation or upgrade to a newer release of the Intel® Quartus® Prime software.
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