Design Hierarchy and safety IP partitions Preparing the Design Example in the Intel® Quartus® Prime Software DC Link Monitor safety IP partition Creating a Safety IP partition for the DC Link Monitor and PLL Subsystem Component Creating a Safety IP partition for the PWM Interface Component Creating a Safety IP LogicLock Region for the DC Link Monitor Creating a LogicLock Region for the PWM Interface Creating a Fixed Size and Origin for a LogicLock Region Removing Precomiled Netlists Using the Intel® Quartus® Prime Incremental Compilation Compiling the Design The Fitter Report Exporting Safety IP Partition Generating Safety IP Bitstream Files
Creating a LogicLock Region for the FOC Fixed-Point Component
Create a New LogicLock Region:
- In the Project Navigator, right-click on the entity DOC_Single_Axis_FE2H_CVE_FOC_fixed_point:foc_fixed_point
- Select LogicLock Region > Create New LogicLock Region.
Nonsafety IP partitions have no special restrictions on the partition and LogicLock settings. In the example, the partition netlist type is set to Source File and the LogicLock region is set to Auto.