Design Hierarchy and safety IP partitions Preparing the Design Example in the Intel® Quartus® Prime Software DC Link Monitor safety IP partition Creating a Safety IP partition for the DC Link Monitor and PLL Subsystem Component Creating a Safety IP partition for the PWM Interface Component Creating a Safety IP LogicLock Region for the DC Link Monitor Creating a LogicLock Region for the PWM Interface Creating a Fixed Size and Origin for a LogicLock Region Removing Precomiled Netlists Using the Intel® Quartus® Prime Incremental Compilation Compiling the Design The Fitter Report Exporting Safety IP Partition Generating Safety IP Bitstream Files
Creating a Fixed Size and Origin for a LogicLock Region
The LogicLock size and origin for every component is different. A safety IP partition must have a fixed size and origin for its LogicLock region, otherwise the fitter gives an error. You can run a trial Intel® Quartus® Prime compilation with the LogicLock region set to Auto size and floating origin and then use this result to fix the region:
- Temporarily turn off Allow partition to be strictly preserved for safety in the Design Partitions Properties… window
- Set the LogicLock region to Auto size and floating origin.
- Compile the design.
- Open the LogicLock Regions Properties window again and then select Set Size and Origin to Previous Fitter Results.
- Turn on Allow partition to be strictly preserved for safety in the Design Partitions Properties… window
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