AN 704: FPGA-based Safety Separation Design Flow for Rapid Functional Safety Certification

ID 683720
Date 9/01/2018
Document Table of Contents

Design Considerations

The architecture and design hierarchy options for an industrial system with functional safety requirements are vast, and coupled closely to the application. In this example, the safety IP partitions demonstrate the design flow in the context of multiple partitions and hierarchical partitions with associated clocking structures, PLLs, and IO pins.

This application note does not recommend which IP you should categorize as safety IP and nonsafety IP.