Visible to Intel only — GUID: bhc1411109322234
Ixiasoft
Visible to Intel only — GUID: bhc1411109322234
Ixiasoft
System-Level Debugging Infrastructure
Because the JTAG resource is shared among multiple on-chip applications, an arbitration scheme must define how the USER0 and USER1 scan chains are allocated between the different applications. The system-level debugging (SLD) infrastructure defines the signaling convention and the arbitration logic for all programmable logic applications using a JTAG resource. The figure below shows the SLD infrastructure architecture.
Did you find the information on this page useful?
Feedback Message
Characters remaining: