Visible to Intel only — GUID: bhc1411109460062
Ixiasoft
Visible to Intel only — GUID: bhc1411109460062
Ixiasoft
Write Logic
Instruction Register Value |
Function |
---|---|
PUSH |
Instruction to write a single value to the write side logic of the DCFIFO. |
POP |
Instruction to read a single value from the read side logic of the DCFIFO |
FLUSH |
Instruction to perform a burst read transaction from the FIFO until empty. |
The IR decode logic shifts the Push_in virtual DR chain when the PUSH instruction is on the IR port and virtual_state_sdr is asserted. A write enable pulse, synchronized to the write_clock, asserts after the virtual_state_udr signal goes high. The virtual_state_udr signal guarantees stability from the virtual DR chain. The figure below shows the write side logic for the DCFIFO.
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