Visible to Intel only — GUID: bhc1411109303441
Ixiasoft
Visible to Intel only — GUID: bhc1411109303441
Ixiasoft
Applications of the Virtual JTAG Intel® FPGA IP Core
The hub automatically arbitrates between multiple applications that share a single JTAG resource. Therefore, you can use the IP core in tandem with other on‑chip debugging applications, such as the Signal Tap logic analyzer, to increase debugging visibility. You can also use the IP core to provide simple stimulus patterns to solicit a response from the design under test during run‑time, including the following applications:
- To diagnose, sample, and update the values of internal parts of your logic. With this IP core, you can easily sample and update the values of the internal counters and state machines in your hardware device.
- To build your own custom software debugging IP using the Tcl commands to debug your hardware. This IP communicates with the instances of the Virtual JTAG Intel® FPGA IP core inside your design.
- To construct your design to achieve virtual inputs and outputs.
- If you are building a debugging solution for a system in which a microprocessor controls the JTAG chain, you cannot use the Signal Tap logic analyzer because the JTAG control must be with the microprocessor. You can use low‑level controls for the JTAG port from the Tcl commands to direct microprocessors to communicate with the Virtual JTAG Intel® FPGA IP core inside the device core.
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