Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/02/2023

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Document Table of Contents Evaluate Global and Non-Global Usage

For Intel® Arria® 10 and Intel® Cyclone® 10 GX designs that contain many clocks, evaluate global and non-global signals to determine whether global resources are used effectively, and if not, consider making changes. After running the Fitter, refer to the Global and Other Fast Signals report to review data on these signals.
Note: Intel® Stratix® 10 and Intel® Cyclone® 10 GX devices do not contain regional clocks, but use local routing.

The figure shows an example of inefficient use of a global clock.

Figure 28. Inefficient Use of a Global Clock in Arria 10 Design—Single Fan-Out from Global Clock

If you assign these resources to a Regional Clock, the Global Clock becomes available for another signal. You can ignore signals with an empty value in the Global Line Name column as the signal uses dedicated routing, and not a clock buffer. The Non-Global High Fan-Out Signals report lists the highest fan-out nodes not routed on global signals. Reset and enable signals appear at the top of the list.

If there is routing congestion in the design, and there are high fan-out non-global nodes in the congested area, consider using global or regional signals to fan-out the nodes, or duplicate the high fan-out registers so that each of the duplicates can have fewer fan-outs. Use the Chip Planner to locate high fan-out nodes, to report routing congestion, and to determine whether the alternatives are viable.