Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/02/2023

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Document Table of Contents Automatic Register Duplication: Hierarchical Proximity

Leveraging design hierarchy information to guide the creation of duplicates and their fan-out assignments is enabled by the DUPLICATE_HIERARCHY_DEPTH assignment.
set_instance_assignment -name DUPLICATE_HIERARCHY_DEPTH -to <register_name> <num_levels>


  • register_name is the last register in a chain that fans out to multiple hierarchies. To create a register tree, ensure that there are sufficient simple registers behind the node and those simple registers are automatically pulled into the tree.
  • num_levels corresponds to the upper bound of the number of registers that exist in the chain to use for duplicating down the hierarchies.

The DUPLICATE_HIERARCHY_DEPTH assignment is processed during the Synthesis stage. It is common for high-fanout signals to go through a pipeline of registers and drive into a sub-hierarchy of modules. For example, a system-wide reset can be propagated over several clock cycles and driven into many modules across the design. In several scenarios, it is useful to take advantage of the structure of this sub-hierarchy to infer the structure of the register tree to be created, such that endpoints within similar hierarchies are assigned the same copy of the signal, and branches in the design hierarchy dictates where to place branches in the register tree.


The registers in the chain must satisfy all of the following conditions to be included in duplication:

  • Registers must be fed only by another register.
  • Registers must not be fed by a combinational logic.
  • Registers must not be part of a synchronizer chain.
  • Registers must not have any secondary signals.
  • Registers must not have a preserve attribute or a PRESERVE_REGISTER assignment.
  • All registers in the chain except the last one must have only one fan-out.

Consider the following example illustration of a netlist with a register chain and hierarchical organization of the endpoints it drives. The DUPLICATE_HIERARCHY_DEPTH assignment duplicates the pipeline registers across hierarchies, as shown in Registers Duplicated Across Hierarchies.

Figure 66. Original Diagram Showing Four Pipeline Registers Connected to Multiple Hierarchies

In this case, regZ is the appropriate assignment target as it is the endpoint in a chain of four registers. There is a maximum of three duplication candidates in this example (regZ, regY, and regX), so the assignment value can be anywhere between 1 and 3. regA is not pulled into the hierarchy to preserve the timing and optimization of paths that precede it. The DUPLICATE_HIERARCHY_DEPTH assignment is best used when a signal must be duplicated to more than 100 duplicates and the sub-hierarchy below the chain is deep and meaningful enough to guide the structure of the tree required.

Figure 67. Netlist After Duplicating regZ to Hierarchy Level One set_instance_assignment -name DUPLICATE_HIERARCHY_DEPTH -to regZ 1

When num_levels is set to 1, only regZ is pulled out of the chain and pushed down one hierarchy level into its fan-out tree.

Figure 68. Netlist After Duplicating regZ to Hierarchy Level Two set_instance_assignment -name DUPLICATE_HIERARCHY_DEPTH -to regZ 2

When num_levels is set to 2, both regY and regZ are pulled out of the chain. regZ ends up at a maximum hierarchy depth two and regY ends up at hierarchy depth one.

Figure 69. Registers Duplicated Across Hierarchies set_instance_assignment -name DUPLICATE_HIERARCHY_DEPTH -to regZ 3

When num_levels is set to 3, all three registers (regZ, regY and regZ) are pulled out of the chain and pushed to a maximum hierarchy depth of three, two, and one levels, respectively.

The Hierarchical Tree Duplication Summary panel in the Synthesis report provides information on the registers specified by the DUPLICATE_HIERARCHY_DEPTH assignment. It also includes a reason for the chain length that can be used as a starting point for further improvements with the assignment. The Synthesis report also provides a panel named Hierarchical Tree Duplication Details, which provides information about the individual registers in the chain that can be used to better understand the structure of the implemented duplicates.