Creates a LUT cell or flip-flop in the design netlist. The following use cases apply:
- Adding a gate to fix a logic bug.
- Adding a wire LUT to help add hold delay.
- Creates a new flip-flop or flip-flops where needed.
The name of the new node is hierarchical. Therefore, when creating node a|b|c|d, you must ensure that hierarchy a|b|c exists in the netlist. If the source or destination node lies under a partition, the new LUT inserts under that partition.
After creating the new node, you can run the following commands to connect, modify the lutmask, or place the new node:
- Run make_connection to connect to the new LUT’s DATA inputs and output port.
- Run modify_lutmask to change the lutmask for the new LUT.
- Run place_node to place (and subsequently route) the new LUT.
This flow ensures that all routing requirements are analyzed when determining a legal placement for the new node.
The following example creates a new_lut LUT node with input ports DATAA and DATAB, and with outputs connected accordingly. modify_lutmask the modifies the lutmask to perform A&B logic. place_node next places the new LUT. The connections route after node placement is complete.
create_new_node -name new_lut -type lut make_connection -from src_a -to new_lut -port DATAA make_connection -from src_b -to enew_lut -port DATAB make_connection -from new_lut -to dst_reg -port D modify_lutmask -to new_lut -eqn A&B place_node -name new_lut
To connect to a new flip-flop node that you create, use the make_connection command to connect to the flip-flop data port (D), and control ports (CLK, ENA, SCLR, CLRN), and from its output Q port. You must place the new flip-flop node with the place_node command. The connections are automatically routed after the place_node command.
create_new_node -name my_ff -type ff make_connection -from reg0 -to my_ff -port D make_connection -from clk -to my_ff -port CLK make_connection -from my_ff -to reg1 -port D place_node -name my_ff -location “X10 Y10 X10 Y10”
- Name of the new LUT of flip-flop node.