Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/02/2023
Public

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Document Table of Contents

4.4. Netlist Optimizations and Physical Synthesis Revision History

The following revision history applies to this chapter:

Document Version Intel® Quartus® Prime Version Changes
2022.01.07 21.4
  • Revised Disabling or Enabling Physical Synthesis Optimization topic for default state.
  • Revised Physical Synthesis Options for device support limitations.
  • Corrected syntax error in Scripting Support topic.
  • Revised Synthesis Netlist Optimizations and Associated Settings topic for latest options.
2019.04.24 18.1 Updated example in "Netlist Optimizations and Physical Synthesis" topic.
2019.04.18 18.1 Clarified wording in "Netlist Optimizations and Physical Synthesis" topic.
2018.09.24 18.1 Removed reference to unsupported CASCADE buffer from "Optimize IOC Register Placement for Timing Logic Option" topic.
2018.05.07 18.0 Removed topic: Isolating a Partition Netlist.
2017.11.06 17.1
  • Removed reference to .vqm files
  • Added topic: Isolating a Partition Netlist.
2016.10.31 16.1
  • Implemented Intel rebranding.
  • Updated physical synthesis options and procedure.
2016.05.02 16.0
  • Removed information about deprecated physical synthesis options.
2015.11.02 15.1
  • Changed instances of Quartus II to Intel® Quartus® Prime .
  • Added Physical Synthesis.
2014.12.15 14.1
  • Updated location of Fitter Settings, Analysis & Synthesis Settings, and Physical Synthesis Optimizations Settings to Compiler Settings.
  • Updated DSE II content.
June 2014 14.0 Updated format.
November 2013 13.1 Removed HardCopy device information.
June 2012 12.0 Removed survey link.
November 2011 10.0.2 Template update.
December 2010 10.0 Template update.
July 2010 10.0
  • Added links to Intel® Quartus® Prime Help in several sections.
  • Removed Referenced Documents section.
  • Reformatted Document Revision History
November 2009 9.1
  • Added information to “Physical Synthesis for Registers—Register Retiming”
  • Added information to “Applying Netlist Optimization Options”
  • Made minor editorial updates
March 2009 9.0
  • Was chapter 11 in the 8.1.0 release.
  • Updated the “Physical Synthesis for Registers—Register Retiming” and “Physical Synthesis Options for Fitting”
  • Updated “Performing Physical Synthesis Optimizations”
  • Deleted Gate-Level Register Retiming section.
  • Updated the referenced documents
November 2008 8.1 Changed to 8½” × 11” page size. No change to content.
May 2008 8.0
  • Updated “Physical Synthesis Optimizations for Performance on page 11-9
  • Added Physical Synthesis Options for Fitting on page 11-16