Intel® Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 10/02/2023
Public

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5.1.2.1.2. Delay Chain Summary Report

A delay chain is a series of LCELL or EXP primitives or I/O delay chains in the I/O block that you use to create an intentional delay or asynchronous pulse. A delay chain is generally unreliable because the best-case delay of an LCELL or EXP cannot be guaranteed. This delay chain configuration also increases the sensitivity of the design to operating conditions.

The Delay Chain Summary report (Route Stage > Delay Chain Summary) summarizes information about the delay chains in your design. This report lists the node name and pin type in the chain. Delay chains appear in terms of their delay chain fan-out setting and actual delay in ps.

Figure 23. Example Delay Chain Summary Report (Truncated)