AN 661: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig IP Cores

ID 683640
Date 10/14/2019
Document Table of Contents

1.1.1. Implementing Fractional PLL Reconfiguration on 28-nm Devices Using the Intel® Quartus® Prime Software

You can use the Altera PLL Reconfig IP core to enable reconfiguration circuitry in the Altera PLL IP core instantiation in your design.

The Altera PLL Reconfig IP core simplifies the fractional PLLs reconfiguration process. The Altera PLL Reconfig IP core interacts with a user control logic and a bus that connects directly to the Altera PLL instance using the Avalon® Memory-Mapped (Avalon-MM) interface.