AN 661: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig IP Cores

ID 683640
Date 10/14/2019
Document Table of Contents

1.2.2. Performing Dynamic Phase Shifting with Altera PLL Reconfig IP Core

To perform dynamic phase shifting, follow steps 1-4 in “Reconfiguring Fractional PLL Settings with Avalon-MM Interface”, except in step 2, you only need to write to the Dynamic_Phase_Shift register.
If you assert the areset signal to fPLL after the dynamic phase shift, you lose all successful phase adjustment with dynamic phase shift in user mode.