AN 307: Intel® FPGA Design Flow for Xilinx* Users

ID 683562
Date 3/20/2018

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents State Machine Editor

The Intel® Quartus® Prime Pro Edition software supports graphical state machine entry. To create a new finite state machine (FSM) design:
  1. Click File > New.
  2. In the New dialog box, expand the Design Files list, and then select State Machine File.