AN 307: Intel® FPGA Design Flow for Xilinx* Users

ID 683562
Date 3/20/2018

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Document Table of Contents Read-During-Write Operation at the Same Address

There are two types of read-during-write operations: same-port operations and mixed-port operations.

Figure 12. Read-During-Write Data Flow
The same-port read-during-write mode applies to either:
  • a single-port RAM
  • the same port of a true-dual port RAM
  • the same port a of simple quad-port RAM
Mixed-port read-during-write mode applies to a RAM in:
  • simple-dual port
  • true-dual port
  • simple-quad port mode
that has one port reading and the other port writing to the same address location with the same clock.

Intel® FPGA RAM and Xilinx* RAM support both read-during-write port modes. However, they have different output options. These options vary depending on the operation mode and type of embedded memory block or device that you select.

Intel® FPGA RAMs support configurations with output options of NEW_DATA (flow-through), OLD_DATA, DONT_CARE, or NEW_A_OLD_B. Xilinx* RAMs support configurations with output options READ_FIRST, WRITE_FIRST, or NO_CHANGE.

Table 41.  Output Options in Xilinx* RAM and Intel® FPGA RAM for Read-During-Write Operation
Description Output after Read-During-Write operation Types of RAM Output
Xilinx* Intel® FPGA
Output reflects the new data at that address. New data WRITE_FIRST NEW_DATA
Outputs reflect the old data at that address before the new data is written into memory. Old data READ_FIRST OLD_DATA
Outputs reflect the previous read data and remains unaffected by the write operation. Unaffected NO_CHANGE Not supported23
Read-during-write writes new data into memory, and the output displays unknown values. Unknown Not supported DONT_CARE 24
For simple quad port, the read-during-write operation behaves differently for each port:
  • In port A, the operation writes new data into memory and displays new data at output
  • In port B, the operation writes new data but displays old data.
Port A: New data

Port B: Old data

Not supported NEW_A_OLD_B

In Intel® FPGA RAMs, the output choices depend on the operation mode and the type of embedded memory block. For information about output choices for same-port and mixed-port read-during-write modes, refer to the Embedded Memory Blocks chapter in the corresponding device handbook.

23 To implement NO_CHANGE behavior, you must add additional logic. Use the write_enable signal and compare the write and read addresses to track the operation.
24 You can choose DONT_CARE for a read-during-write operation if the output is not crucial to your design.