AN 307: Intel® FPGA Design Flow for Xilinx* Users

ID 683562
Date 3/20/2018

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4.1.1. Converting I/O Buffers

The Intel® Quartus® Prime Pro Edition Compiler inserts input, output, or bidirectional buffers automatically.
To convert a design's buffers to the Intel® Quartus® Prime Pro Edition software:
  1. Remove all buffer primitives from the Xilinx* design in the HDL code.
  2. Replace the primitives with wire or signal assignments in the HDL code.
  3. In the Assignment Editor, perform assignments depending on the type of buffer:
    Type of Buffer Assignment to use
    Buffers with selectable I/O standard I/O Standard
    Global buffers Global Signal
    Global buffer with I/O Standard I/O Standard